Industry
Industry — The Pure-Play Semiconductor Foundry
Figures converted from TWD at historical FX rates — see data/company.json.fx_rates. Ratios, margins, and multiples are unitless and unchanged.
1. Industry in One Page
The pure-play semiconductor foundry industry is contract manufacturing for chip designers: a customer hands over a design, the foundry runs the wafers through hundreds of process steps, and gets paid per wafer. It is one of the most extreme businesses in capitalism — winner-take-most economics, single-digit-billion-dollar fabs, ~50% operating margins at the leader, and a near-monopoly on the equipment (ASML) that makes the latest nodes possible. Three forces shape the arena: (1) AI demand is pulling more silicon than the planet can build, (2) each new process node costs more, takes longer, and requires more concentrated capital — so the leader's share keeps rising, (3) governments now treat advanced foundry capacity as strategic infrastructure, attaching subsidies, export controls, and tariffs to economic decisions that used to be private.
The newcomer's mistake is to think of this as a chip industry. It is a node leadership industry. The same company can be a dominant scale player on 28nm and an unprofitable challenger on 3nm — Intel's foundry segment is the live case study. Position relative to the leading edge, not aggregate share, drives margins.
Global chip market 2030 (TSMC est., US$T)
≤7nm capacity in Taiwan (%)
TSMC foundry share FY2025 (%)
TSMC 2026 capex midpoint (US$B)
Source notes: $1.5T 2030 figure is TSMC's own May 15, 2026 symposium forecast (was $1T). 63% advanced-node capacity in Taiwan from MIC/Sourceready 2025. 69.9% TSMC foundry share from TrendForce FY2025. $52–56B 2026 capex range from TSMC FY2025 20-F and Q4 2025 earnings.
2. How This Industry Makes Money
One sentence: Foundries sell production capacity on a node, priced per wafer and amortized against fab depreciation — margin is dictated by node leadership, utilization, and mix, not by any one product.
The economic chain runs from chip designer (fabless) → foundry → packaging/test (OSAT) → system OEM → end user. Each step monetizes differently:
Takeaway: the highest sustainable margins sit at the two ends — IP/EDA at the front and the foundry leader at the production step — because both have winner-take-most network effects. Everything in between is commodity-prone.
Inside the foundry layer the unit economics look like this:
- Revenue unit: 12-inch (300mm) wafer equivalent. TSMC shipped 4,174 thousand 12"-equivalent wafers in Q1 2026 alone (presentation, 4/16/26). Net revenue ≈ price per wafer × node mix × utilization.
- Wafer ASP rises with node sophistication. A mature-node 28nm wafer prices in the low thousands; a leading-edge 3nm wafer prices in the high tens of thousands. Inside TSMC, 3nm + 5nm + 7nm — "advanced technologies" — was 74% of wafer revenue in Q1 2026 (up from 58% in FY2023).
- Cost stack is mostly fixed. TSMC's 20-F notes manufacturing costs are "largely fixed-cost assets once they become operational." Depreciation alone was $22.1B in FY2025, ~18% of revenue. Variable costs are silicon wafers, chemicals, gases, photoresist, and power.
- Capital intensity is brutal. TSMC capex rose from $17.4B in FY2020 to $40.9B in FY2025 — roughly 33% of revenue — and FY2026 guidance is $52–56B. A single leading-edge fab module costs $15–25B before equipment.
- Bargaining power sits with the customer at scale and with the foundry on advanced nodes. Apple, Nvidia, AMD, Qualcomm, Broadcom each account for high-single to low-double-digit revenue percentages, but cannot multi-source advanced nodes — TSMC's only credible 3nm/2nm rival is Samsung, and its yields trail. Smaller customers take whatever capacity and price they are offered.
TSMC margin stack over twenty years illustrates how operating leverage compounds when leading-edge mix climbs:
Gross margin has stepped up roughly 15 points over two decades despite massive capex inflation. That step-up is what happens when an industry consolidates toward one leader and pricing power follows.
3. Demand, Supply, and the Cycle
One sentence: Demand for advanced chips currently outstrips foundry capacity, but historically the industry whipsaws every 3–5 years as inventory cycles in handsets, PCs, and autos collide with fab depreciation that doesn't pause.
Past downturns and where they hit first:
The historical signature is clear: downturns reveal themselves through utilization first, wafer ASP second, margin third, and only then earnings revisions. Investors who wait for guidance cuts are late by two quarters.
4. Competitive Structure
One sentence: The foundry industry is the most consolidated segment of semiconductors — one leader (TSMC) at ~70% share, a duopoly at the leading edge with Samsung, and a long tail of specialty/mature-node foundries that cannot economically follow to advanced nodes.
Three things the table understates:
- The leading-edge market is essentially a monopoly. Below 5nm, TSMC's share rises to roughly 90%+. Apple, Nvidia, AMD, Broadcom, Qualcomm, Marvell — none have a credible second source for current designs.
- Specialty foundries are not in the same business. GFS and UMC compete on automotive eNVM, RF-SOI, BCD power, and similar specialty platforms where node leadership matters less than process maturity and qualification. They are economic substitutes for TSMC's mature-node revenue, not for HPC revenue.
- The China cluster (SMIC + Hua Hong + Nexchip) is the only true wildcard. Cut off from EUV, it cannot follow to leading edge — but it is being subsidized into massive 28nm/14nm capacity that can flood mature-node pricing for everyone else.
5. Regulation, Technology, and Rules of the Game
One sentence: Foundries are no longer purely commercial — since 2022 they have operated inside a tightening web of export controls, subsidies, tariffs, and tech-transfer rules that materially reshape where capacity is built and at what cost.
Two ideas an investor should hold: subsidies are not free (US/EU funded fabs come with labor, supply-chain, and audit conditions that compress unit economics by several margin points), and export controls are a one-way ratchet — once a license requirement for 16nm is written, the next administration will rarely loosen it.
6. The Metrics Professionals Watch
One sentence: Foundry economics distill to seven numbers; everything else is noise around node mix, capacity tightness, and capital recovery.
A working scorecard for TSMC against these benchmarks today:
7. Where Taiwan Semiconductor Manufacturing Company Limited Fits
One sentence: TSMC is the structurally dominant scale player at every leading-edge node, the price-setter in advanced foundry, and the only company outside a handful of memory makers and Intel that operates at meaningful semiconductor production scale.
8. What to Watch First
Five to seven signals that move the industry tape for TSMC — observable in filings, transcripts, regulators, or industry data within a quarter.
The industry backdrop in May 2026 is favorable for TSMC: AI demand exceeds capacity, leading-edge monopoly is intact, regulation currently advantages Taiwanese foundries investing in the US, and pricing power is firm. The asymmetric risks are concentrated and identifiable: Samsung yield catch-up at 2nm, a Taiwan-strait disruption, and capex outrunning end-demand — all monitorable through the signals above.